In recent years, further size reduction, lower power consumption and higher functionality have been demanded for information apparatuses such as computers. Along with these demands, there has also been a demand for non-volatile semiconductor memories that enable higher integration, operate at a higher speed, and retain stored data even when power is not supplied. As one of the next generation non-volatile semiconductor memories capable of meeting such demands, a resistance change memory (Resistive Random Access Memory: hereinafter referred to as “ReRAM”) including a resistance change element has been developed (see, for example, Non Patent Citations 1, 2).
In a ReRAM, data is stored by utilizing change in a resistance value of a resistance change element. As depicted in FIG. 1, the resistance change element is configured such that an NiO film (nickel oxide film) 12 or another transition metal oxide film is sandwiched in between a pair of electrodes 11a, 11b made of Pt (platinum). When a treatment applying a predetermined voltage to the resistance change element configured as such (electroforming: hereinafter referred to as “forming”) is carried out, it is possible to change the resistance value by controlling the current and voltage.
FIG. 2 is a view depicting the state change of the resistance change element by taking the horizontal axis as voltage and the vertical axis as current. As depicted in this FIG. 2, the resistance change element transitions between a high resistance state and a low resistance state according to the current flowing through the inside of the resistance change element and the voltage applied thereto. In the high resistance state, as depicted by a in the Figure, the current flowing through the inside of the resistance change element increases as the applied voltage becomes higher, while the inclination of the curved line depicting the relationship between the voltage and the current is relatively small. In contrast, when the applied voltage becomes equal to or higher than a specified voltage (as depicted by b in FIG. 2), the resistance value decreases rapidly (as depicted by c in the Figure). As a result, the current increases rapidly. For this reason, a limiter circuit for preventing rapid current increase is provided for the ReRAM so as to prevent a large current from flowing into the resistance change element.
In the low resistance state, as depicted by d in the Figure, the inclination of the curved line depicting the relationship between the voltage and the current is large. When the current flowing into the resistance change element becomes a specified value (as depicted by e in the Figure), the resistance change element transitions to the high resistance state (as depicted by f in the Figure), and the current decreases rapidly.
As described above, the resistance change element transitions to the low resistance state when a voltage equal to or higher than a specified voltage is applied in the high resistance state, while the resistance change element transitions to the high resistance state when a current equal to or higher than a specified current is applied in the low resistance state. The resistance value in the low resistance state is approximately several kΩ and the resistance value in the high resistance state is from approximately several tens kΩ to 1 MΩ. Note that, in general, the change from the high resistance state to the low resistance state is referred to as “set” and the change from the low resistance state to the high resistance state is referred to as “reset”.
Since the NiO film constituting the resistance change element is an oxide, the electrodes holding both sides of the NiO film is an easily-oxidizable state. For this reason, the electrodes of the resistance change element are formed of a metal which is hardly oxidized. Specifically, the electrodes are formed of a noble metal such as Pt or Ir (iridium). Patent Citation 1 describes a non-volatile memory having a resistance change element with the structure in which a film made of any of transition metal oxides such as NiO, TiO2, HfO, ZrO, ZnO, WO3, COO, and Nb2O5 is sandwiched in between a pair of electrodes.
Other conventional techniques which presumably relate to the embodiments are disclosed in Patent Citations 2 to 8. Patent Citation 2 discloses that an electrode is formed of Pt (platinum), Ir (iridium), IrO (iridium oxide), RuO (ruthenium oxide) or the like in a polycrystalline memory having a thin film made of a polycrystalline memory material such as a perovskite or a ferroelectric substance. In addition, Patent Citations 3 to 7 disclose that an upper electrode is formed to have a laminated structure of, for example, Pt and PtO in a semiconductor device (memory) having a ferroelectric capacitor. Furthermore, Patent Citation 8 discloses the structure in which an oxidation resistant layer made of TiN, TaN, or the like and a refractory metal layer made of Pt, Ir, IrO2, Ru, RuO2, or the like are laminated in RRAM having a colossal magnetoresistive (CMR) metal layer.
Patent Citation 1: Japanese Laid-open Patent Application Publication No. 2006-140489
Patent Citation 2: Japanese Laid-open Patent Application Publication No. 2003-273333
Patent Citation 3: Japanese Laid-open Patent Application Publication No. 2000-133633
Patent Citation 4: Japanese Laid-open Patent Application Publication No. 2000-91539
Patent Citation 5: Japanese Laid-open Patent Application Publication No. 2004-296735
Patent Citation 6: Japanese Laid-open Patent Application Publication No. 2004-146551
Patent Citation 7: Japanese Laid-open Patent Application Publication No. 2003-229540
Patent Citation 8: Japanese Laid-open Patent Application Publication No. 2005-175457
Non Patent Citation 1: K. Kinoshita et al., “Bias polarity dependent data retention of resistive random access memory consisting of binary transition metal oxide”, APPLIED PHYSICS LETTER 89, 103509 (2006)
Non Patent Citation 2: S. Seo et al., “Reproducible resistance switching in polycrystalline NiO films”, APPLIED PHYSICS LETTER Vol. 85, No. 23, 6 Dec. 2004